Eckert-Mauchly Award

ACM/IEEE-CS Eckert-Mauchly Award

Administered jointly by ACM and IEEE Computer Society, the ACM - EEE-CS Eckert-Mauchly Award is given for contributions to computer and digital systems architecture where the field of computer architecture is considered at present to encompass the combined hardware-software design and analysis of computing and digital systems. The award was named for John Presper Eckertand John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the first large-scale electronic computing machine, and is widely recognized as the computer architecture community’s most prestigious award.

Learn more about Eckert-Mauchly Award and nominations process

Charles P. “Chuck” Thacker

Winner of the 2017 Award

The late Charles P. “Chuck” Thacker was named recipient of the ACM - IEEE CS Eckert-Mauchly Award for fundamental networking and distributed computing contributions including Ethernet, the Xerox Alto, and development of the first tablet computers. Often hailed as an “engineer’s engineer,” Thacker made fundamental contributions across the full breadth of computer development, from analog circuit and power supply design to logic design, processor and network architecture, system software, languages, and applications.

In 1970, Xerox opened its Palo Alto Research Center (PARC) and hired several leading computer scientists and engineers, including Thacker. Early on, the staff at Xerox PARC was using a time-sharing approach in which various terminals were connected to a single computer. Because time sharing was a slow and cumbersome process, leaders at Xerox PARC conceived the idea of developing personal computers as part of a network that would be used for communication as well as computation. Mainframe computers in the early 1970s were so large that they took up whole rooms, and their expense made them relatively scarce. Under the paradigm at the time, computer architecture needed to be either scaled up (more hardware) for better performance, or scaled down (less hardware) for lower cost. Thacker realized that a personal computer would need to be designed differently from a standard computer to address space constraints, maintain strong performance, and be inexpensive if it was to become pervasive. At the same time, the idea of a “personal” computer that would be geared more toward human-paced activities called for the engineers to prioritize input/output (I/O) functions rather than application functions, as had traditionally been the case. The new design feature Thacker employed as the Lead Engineer in what would become the Xerox Alto Computer was a central processing unit (CPU) microprocessor that used microcode for most of the computer’s I/O functions, rather than hardware. The microcode controlled various tasks, including executing the normal instruction set, memory refresh, and network and display functions. The Xerox Alto was therefore not simply a mini-version of existing computers, but had a novel architecture that allowed it to deploy new kinds of software.

Today the Alto is recognized as being the first modern personal computer. The initial architecture of the Alto gave rise to other important inventions developed by engineers at Xerox PARC including WYSIWIG (What You See Is What You Get) editing, laser printing, drawing and painting, email, mouse-driven graphical user interfaces, and many other features that are commonplace in personal computers today. Another critical innovation of Thacker’s that was an outgrowth of his work on the Alto was the development of hardware for Bob Metcalfe’s invention of the Ethernet Local Area Network (LAN), which facilitated communication among computers. Twenty years after the development of the Xerox Alto, Thacker made another foundational contribution to personal computing with the development of the Lectrice, a laboratory prototype for today’s portable PCs. He went on to develop a prototype upon which Microsoft Tablet PC software was developed, as well as a system for reading electronic books that laid the groundwork for many of today’s e-readers. One of Thacker’s most recent contributions is the design of AN3, a low-cost, efficient circuit-switched data center network.

Uri Weiser

Winner of the 2016 Award

Uri Weiser did pioneering industry and academic work in high performance processors and multimedia architectures. In a nearly 40-year career that has included roles in government, industry and academia, Weiser has made seminal contributions, including defining the first Intel Pentium processor architecture and being a recognized leader in asymmetric and heterogeneous manycore architecture.

In the late 1980s, Weiser was an engineer with Intel’s Design Architecture Group. At the time, Intel was using a Complex Instruction Set Computer (CISC) design for its X86 microprocessors. A debate emerged within the computing field as to whether Reduced Instruction Set Computer (RISC) design would eclipse the CISC design. Intel was contemplating whether to continue to manufacture its X86 processors using the CISC design or abandon the program and repurpose the company to design its microprocessors using RISC-based architecture.

Weiser single-handedly convinced Intel executives to continue with the CISC-based X86 processors by showing that through adding new features such as superscalar execution, branch predication and more, the X86 processors could perform competitively against the RISC family of processors. Wieser’s architectural enhancements laid the foundation for the Intel Pentium processor.

Norman P. Jouppi, Google

Winner of the 2015 Award

Norman P. Jouppi, a Distinguished Hardware Engineer at Google, received the ACM -IEEE CS Eckert-Mauchly Award in 2015 for "pioneering contributions to the design and analysis of high-performance processors and memory systems". He is known for his innovations in computer memory systems, including stream prefetch buffers, victim caching, multi-level exclusive caching, and development of the CACTI tool for modeling memory timing, area, and power. He has been the principal architect and lead designer of several microprocessors, contributed to the architecture and design of graphics accelerators, and extensively researched video, audio, and physical telepresence. His innovations in microprocessor design have been adopted in many high-performance microprocessors. His recent research has investigated the impact of emerging technologies such as non-volatile memory and nanophotonics on computer systems.

Norm received his Ph.D. in electrical engineering from Stanford University in 1984, and a master of science in electrical engineering from Northwestern University in 1980. While at Stanford he was one of the principal architects and designers of the MIPS microprocessor, and developed techniques for MOS VLSI timing verification. He joined HP in 2002 through its merger with Compaq, where he was a Staff Fellow at Compaq's Western Research Laboratory (formerly DECWRL) in Palo Alto, California. In 2010 he was named an HP Senior Fellow. From 1984 through 1996 he was a consulting assistant/associate professor in the electrical engineering department at Stanford University where he taught courses in computer architecture, VLSI, and circuit design.

He currently serves on the research highlights editorial board of Communications of the ACM. Norm holds more than 75 U.S. patents, with one Compaq Key Patent award. He has published over 125 technical papers, with several best paper awards and two International Symposium on Computer Architecture (ISCA) Influential Paper Awards. In 2013 he received the ACM SIGARCH Distinguished Service Award. He is a Fellow of the ACM and the IEEE, and a member of the National Academy of Engineering.

Trevor Mudge, University of Michigan, Ann Arbor

Winner of the 2014 Award

Trevor Mudge of the University of Michigan received the ACM - IEEE CS Eckert-Mauchly Award in 2014 for "contributions to low-power computer architecture for high-performance microprocessors." Mudge’s inventive approaches have led to new technologies that reduce energy consumption of microprocessors while maintaining acceptable performance in an era of exponential growth in embedded processors and system-on-chip designs. His contributions greatly influenced both the research literature and the actual products made possible by his research.

During his years as a research professor, Mudge recognized that limiting power consumption presented a critical computing issue. He concluded that reducing power consumption would require adding architectural improvements to process and circuit improvements, and raised the priority of this constraint early in the design stage. He also understood that, as the speed of microprocessors increased along with density, their leakage power consumption also increased. This realization led him to identify on-chip caches as one of the main candidates for leakage reduction since they contain a significant fraction of the processor’s transistors. The resulting technique for reducing leakage power was the exploitation of “drowsy caches,” which led to putting the cold cache lines into a low-power mode.

With his team from the University of Michigan, Mudge proposed Razor, a circuit technique that allows robust operation at very low voltages in processor pipelines based on dynamic detection and correction of circuit timing errors. More recently, he has explored near-threshold computing, a design space where the supply voltage is approximately equal to the threshold voltage of the transistors in a microprocessor. The approach is applicable to a broad range of power-constrained computing segments from sensors to higher-performance servers.

A graduate of the University of Reading, England with a B.S. degree in Cybernetics, Mudge earned M.S. and Ph.D. degrees in Computer Science from the University of Illinois. He holds the Bredt Family Chair of Engineering at the University of Michigan.

James R. Goodman, University of Auckland

Winner of the 2013 Award

ACM and IEEE-CS have selected James R. Goodman as the 2013 recipient of this prestigious award for contributions to the hardware/software interface. Cited for "pioneering contributions to the architecture of shared-memory multiprocessors," his innovations led to the development of hybrid approaches to HPC memory systems that can achieve nearly the performance of hardware but with the flexibility of software. Goodman is a CS professor at the University of Auckland (New Zealand) who formerly worked at Intel. In his seminal 1983 paper, Using Cache Memory to Reduce Processor-memory Traffic, Goodman was the first to describe what he termed snooping cache coherence protocols for maintaining the security of stored data in multiprocessing environments. The paper also identified the cache’s importance in conserving memory bandwidth. This work is reflected in virtually every computer built and sold today, reflecting the broad influence of his innovations.

Goodman was the principal co-inventor of hardware queue-based locks, which allow programs with spinning (busy-wait synchronization) to scale to very large multiprocessors. He also introduced critical section speculation, which helped launch the resurgence of transactional memory — used for controlling access to shared memory — as a parallel programming and synchronization method. Architectures based on this work have recently begun to appear in products, including the flagship microprocessors from Intel.

Goodman also co-authored the highly-acclaimed book A Programmer's View of Computer Architecture with Karen Miller, as well as Structural Computer Architecture with Andrew Tanenbaum. He is a Fellow of IEEE and ACM.