Seymour Cray Award

William Camp, Sandia National Laboratories

Winner of the 2016 Award

William Camp has had a distinguished and prolific career of scientific and high performance leadership achievements in computational science and high performance computing spanning efforts as a user of computing, a leader of computational research, an advocate for computation as a major pillar of science and engineering, and for specific contributions to massively parallel computational methods and massively parallel hardware/software architectures.

A pinnacle achievement of Camp was his visionary leadership of the development of the Red Storm supercomputer. In 2000, Camp and his colleague, Jim Tomkins developed and patented the Red Storm architecture; and Camp led a partnership with Cray to build it. ASCI Red Storm became the Cray XT3 and the follow-on XT-series, which are arguably the most successful supercomputers to date. In 2006, Camp joined Intel as Chief Supercomputing Architect and directed Intel’s Exascale R&D efforts. His team’s work led to detailed architectures and conceptual designs for Exascale. Bill also led Intel’s efforts to create joint Exascale labs with leading European computing centers. Bill received two Intel individual achievement awards recognizing those accomplishments. Currently, Camp consults on computing technologies for post-Exascale computing.

Camp spent most of his career at NNSA’s Sandia Labs, at Cray Research and at Intel. At Sandia, he founded DOE’s Massively Parallel Computing Research Lab (MPCRL). In its first 5 years the MPCRL won the inaugural Gordon Bell Prize, several other international awards, and 8 R&D100 Awards-- all for pioneering highly scalable applications, algorithms, and methods as well as for developing scalable systems software and hardware. The MPCRL received over 30 patents for MPP technologies. While on leave at Cray, Camp led scalable applications development for the T3D and T3E computer systems and served on the T3E core design team. Camp returned to Sandia to direct NNSA’s newly formed Accelerated Strategic computing Initiative (ASCI) and to direct Sandia’s Computing Information, and Math R&D, as well as contributing to MPP design and development. His team stood up a series of first-ever computing capabilities: First 1000+ PE MPP, first MPP to lead Top 500 list (Paragon), first tera-scale computer (ASCI RED), and first tera-scale cluster-based supercomputing environment (CPlant). A National Merit Scholar at Manhattan College in EE/NE, Camp received his PhD at Cornell for work in theoretical and computational physics.

Matteo Valero, Polytechnic University of Catalonia

Winner of the 2015 Award

Mateo Valero, a professor in the Computer Architecture Department at UPC in Barcelona and the Director of the Barcelona Supercomputing Center at the National Center of Supercomputing in Spain, has been named the recipient of the 2015 IEEE Computer Society Seymour Cray Computer Engineering Award “in recognition of seminal contributions to vector, out-of-order, multithreaded, and VLIW architectures.” The Seymour Cray Computer Engineering award is one of the IEEE Computer Society’s highest awards, and is presented in recognition of innovative contributions to high-performance computing systems that best exemplify the creative spirit demonstrated by Seymour Cray. The award consists of a crystal memento, a certificate, and a US$10,000 honorarium.

Valero’s research is in the area of computer architecture, with special emphasis on high-performance computers, including processor organization, memory hierarchy, interconnection networks, numerical algorithms, compilers, and performance evaluation and runtime-aware architecture for multicore. He has published approximately 600 papers, has served in the organization of more than 300 international conferences, and has given more than 500 invited talks at conferences, universities, and companies. Prof. Valero has been an associate editor of IEEE Transactions on Parallel and Distributed Systems, IEEE Micro, IEEE Computer Architecture Letters, Parallel Programming Languages, and the editor of several special issues of IEEE Transactions on Computers and Computer magazine.

Valero has been honored with several prestigious awards including the IEEE-Computer Society ACM Eckert-Mauchly Award, the IEEE Computer Society Harry Goode Award, the ACM Distinguished Service Award, the Euro-Par Achievement Award, the King Jaime I in basic research, and two Spanish National Awards—the Julio Rey Pastor award, in recognition of research on informatics and/or mathematics, and the Leonardo Torres Quevedo award for engineering.

He has been named Honorary Doctor by the Spanish Universities of Las Palmas de Gran Canaria, Zaragoza, Complutense de Madrid, and Cantabria, and by the University of Chalmers in Sweden, the University of Belgrade in Serbia, and the University of Veracruz in Mexico. He is a Hall of the Fame member of the IST European Program (selected as one of the 25 most influential European researchers in IT from 1983–2008 in Lyon, November 2008). In 1994, Prof. Valero became a founding member of the Royal Spanish Academy of Engineering. In 2005, he was elected Correspondent Academic of the Spanish Royal Academy of Science; in 2006, member of the Royal Spanish Academy of Doctors; in 2008, member of the Academia Europaea; and in 2012, Correspondent Academic of the Mexican Academy of Sciences. Prof. Valero is a Fellow of the IEEE, a Fellow of the ACM, and an Intel Distinguished Research Fellow. In 1998, Prof. Valero won a “Favorite Son” Award in his home town, Alfamen (Zaragoza), and in 2006, his native town named their public college after him.

Gordon Bell, Researcher Emeritus at Microsoft's Silicon Valley Laboratory

Winner of the 2014 Award

Gordon Bell has been awarded the IEEE’s Seymour Cray Computer Engineering Award for "his exceptional contributions in designing and bringing several computer systems to market that changed the world of high performance computing and of computing in general, the two most important of these being the PDP-6 and the VAX-11/780." Gordon Bell is a Researcher Emeritus at Microsoft's Silicon Valley Laboratory. He spent 23 years at Digital Equipment Corporation (part of HP) as Vice President of Research and Development. He was the architect of various mini- and time-sharing computers and led the development of DEC's VAX. Bell has been involved in, or responsible for, the design of products at Digital, Encore, Ardent, and a score of other companies.

Bell has a B.S. and M.S. degrees from MIT (1956-57), D. Eng. (hon.) from WPI (1993) and D.Sci and Tech (hon.) from CMU (2010). During 1966-72 he was Professor of Computer Science and Electrical Engineering at Carnegie-Mellon University. In 1986-1987 he was the first Assistant Director of the National Science Foundation's Computing Directorate, CISE. He led the National Research and Education (NREN) Network panel that became the Internet and was an author of the first High Performance Computer and Communications Initiative.

Bell has authored books and papers about computer structures, lifelogging, and startup companies. In April 1991, Addison-Wesley published High Tech Ventures: The Guide to Entrepreneurial Success. In 2009, Dutton published Total Recall written with Jim Gemmel. and describing the journey to storing one's entire life. He is a founder and board member of the Computer History Museum, Mountain View, CA. Bell is a member of various professional organizations including the American Academy of Arts and Sciences (Fellow), American Association for the Advancement of Science (Fellow), ACM (Fellow), IEEE (Fellow and Computer Pioneer), and the National Academy of Engineering, National Academy of Science and the Australian Academy of Technological Science and Engineering. His awards include: IEEE Computer Society Computer Pioneer and Wallace McDowell Awards and ACM/IEEE CS Eckert-Mauchly Award, the IEEE Von Neumann Medal, and the 1991 National Medal of Technology. Mr. Bell lives in San Francisco and Sydney, Australia with his wife, Sheridan Sinclaire-Bell.

Marc Snir, Argonne National Laboratory and University of Illinois at Urbana-Champaign

Winner of the 2013 Award

Marc Snir has been awarded the IEEE’s Seymour Cray Computer Engineering Award for his for "contributions to the research, development, theory, and standardization of high-performance parallel computing including the IBM RS/6000 SP and Blue Gene systems." Marc Snir is Director of the Mathematics and Computer Science Division at the Argonne National Laboratory and Michael Faiman and Saburo Muroga Professor in the Department of Computer Science at the University of Illinois at Urbana-Champaign. He currently pursues research in programming environments for high-performance computing.

He was head of the Computer Science Department from 2001 to 2007. Until 2001 he was a senior manager at the IBM T. J. Watson Research Center where he led the Scalable Parallel Systems research group that was responsible for major contributions to the IBM SP scalable parallel system and to the IBM Blue Gene system.

Marc Snir received a Ph.D. in Mathematics from the Hebrew University of Jerusalem in 1979, worked at NYU on the NYU Ultracomputer project in 1980-1982, and was at the Hebrew University of Jerusalem in 1982-1986, before joining IBM. Marc Snir was a major contributor to the design of the Message Passing Interface. He has published numerous papers and given many presentations on computational complexity, parallel algorithms, parallel architectures, interconnection networks, parallel languages and libraries and parallel programming environments.

Marc is Argonne Distinguished Fellow, AAAS Fellow, ACM Fellow and IEEE Fellow. He has Erdos number 2 and is a mathematical descendant of Jacques Salomon Hadamard. He recently won the IEEE Award for Excellence in Scalable Computing.

Dr. Peter Kogge, University of Notre Dame

Winner of the 2012 Award

Peter Kogge, the Ted H. McCourtney Professor of Computer Science and Engineering at the University of Notre Dame, has been awarded the IEEE’s Seymour Cray Computer Engineering Award for "innovations in advanced computer architecture and systems.” Dr. Kogge has been at the forefront of several innovations that have shaped the computing industry over the past three decades including the invention of the Kogge-Stone-Adder process—still considered the fastest way of adding numbers in a computer, and the design of one of the first multi-threaded computers—and the space shuttle I/O processor which was also the first to fly in space. He recently led a team of computer professionals for the US Defense Advanced Research Projects Agency (DARPA), to explore development of a supercomputer capable of executing a quintillion mathematical operations per second.

His current research areas include massively parallel processing architectures, advanced VLSI and nanotechnologies and their relationship to computing systems architectures, non von Neumann models of programming and execution, and parallel algorithms and applications and their impact on computer architecture.